Schottky Barrier Formation on GaAs

Fig. 1: GaAs(110) surface rearrangement.

From the late 1970's, there were various works of depositing metals, oxygen, and other nonmetals in small fractions of a monolayer to see the movement of the Fermi level. Many models were proposed to explain the Fermi level pinning in the gap. A majority of these studies were on metal deposition and naturally linked to explanations and models of Schottky barrier formation at the metal-semiconductor (MS) interface.

Defect Model

Do intrinsic surface states pin the Fermi level in the bandgap?

If there were no surface states and hence no band bending, the Fermi level would be determined solely by the doping density of the bulk. It appeared experimentally that unpinned surfaces were realizable on properly cleaved GaAs (110) surfaces. Theoretically it was understood that states were moved out of the semiconductor bandgap by surface reconstruction as shown in Figure 1 [1]. This had significant implications on Schottky barriers since it established that the free surface had no intrinsic dangling bonds that could pin the Fermi level (although the intrinsic surface states that are swept out of the bandgap will still affect transport properties). At the same time, with an unpinned surface it is possible to observe the Fermi-level movement as foreign atoms are deposited on the surface.

Fermi level pinning by metal deposition

The general approach was to deposit metal in small percentages of a monolayer and track the Fermi level position with coverage. Usually the pinning is already completed at about 0.1 monolayer (ML) of coverage [1]. Thus the pinning is taken place before a metallic layer is formed. Cs, In, Al, and Ga overlayers are not continuous metals, meaning that a monolayer of these materials would not have metallic behavior. In, Al, and Ga form islands when deposited on the surfaces at room temperature. In the case of Cs, at room temperature only 1ML adheres to the GaAs surface, so the sample must be cooled to deposit additional Cs. Cooling the sample down prevents Cs island formation.

Why would different material overlayers (metals and oxide) produce levels around the same levels? (Figure 2) It is tempting to think that if pinning states are produced by extrinsic states such as vacancies, then the energy levels are possibly independent of the details of the surface atoms and are due to defects at or near the MS interface.

Fig. 2: Fermi level position for n- and p-type GaAs for different overlayers.

The Unified Defect Model (UDM) proposes a simple model that pinning at 0.75eV for n-type samples indicates an acceptor at that level, and pinning point of p-type samples at 0.5eV require a donor at that level. A more refined and sophisticated identity of the defects is introduced in the Advanced UDM.

Advanced Unified Defect Model (AUDM)

III-V compound semiconductors have small electronegativity difference between its constituent atoms, making it easy to form antisite lattice defects. A very common defect in GaAs is As_Ga, which is an As atom sitting on a Ga site. It is worth to mention that the two ionization energies of the As_Ga double donor (0.52eV and 0.75eV from VBM) almost coincides with the Fermi level pinning at Schottky barriers on GaAs, suggesting As_Ga to be the defect mentioned in the UDM.

Fig. 3: Energy level diagram for the AUDM.

Regarding that As_Ga is a double donor, there must be a minority acceptor defect for the Fermi level to be pinned at 0.7eV for n-type GaAs. Studies show that Ga_As antisites produce two acceptor levels between the 0.5eV As_Ga level and the VBM [2] (Refer to Figure 3). By "minority" we are saying that As_Ga antisites should double the Ga_As antisites in number. The Fermi level for the free surface will be determined by the relative densities of the two defects in the surface region. Usually there are more As interstitials at the GaAs surface meaning more As_Ga. As-rich interfaces would pin near the midgap, whereas less As-rich interfaces would pin closer to the VBM.

MIGS Theory

MIGS Theory of Fermi Level Pinning

This theory states that the Fermi level is pinned by states intrinsic to the MS interface called metal-induced gap states (MIGS) [3]. The basic idea is that the first few layers (charge decay length of ~3Å) of a semiconductor near a MS interface are metallic and produces a continuum of states in the gap. Surface states will pin E_F at the energy that gives local charge neutrality, as in any other metal. The barrier height is determined by the surface dipoles and the MS electronegativity difference as well as other bonding subtleties. Then MIGS enters the scene and adds another dipole due to metallic screening, which pins the E_F where local charge neutrality is maintained.

Although it is easy to think that the MIGS come from the metal, there is a sum rule on the local density of states saying that the spectral weight in gap states must come from the local valence band and conduction band. Charge neutrality thus requires occupying MIGS that come mainly from the valence band and leaving those mainly from the conduction band.

Fig. 4: Gv(R,E)(solid line) and Gc(R,E)(dashed line) vs E for GaAs R=a(110).

The gap states at a given energy are characterized using a real-space Green function to determine the energy where the states convert from valence to conduction character [4]. Using the Bloch's theorem and the lattice vector R instead of wave functions,

Further G can be decomposed into G_v and G_c, each are contributions from the valence and conduction band. As you go to higher energy in the gap the conduction band contribution to G dominates and vice versa. Then there would be an energy where , which is likely where the Fermi level will pin (Refer to Figure 4).

Defect Model vs MIGS Theory

In the Defect Model, the intrinsic states are absent from the bandgap from surface reconstruction. As metal or oxygen submonolayers are deposited, local defects are formed to pin the Fermi level. The model asserts that pinning by intrinsic states could be ruled out. J. Tersoff in [3] expressed that the current experimental techniques cannot directly observe the small number of states that are required to pin the Fermi level. An adsorbate will cause local disruptions in the reconstructed surface, inevitably pulling interface states due to dangling bonds back into the gap. The mechanism of defects pinning E_F at the bare surface may not be applicable to an MS interface. Unlike in a bare surface where roughly 10¹² cm^-2 defects can pin the E_F, a MS interface requires 10¹⁴ cm^-2 since there is screening from the metal. However, this large number of defects was not detected by spectroscopic techniques. Later in 1993, W. Spicer [5] says that the original assumption of two pinning positions for metallized overlayers caused him to rule out MIGS which predicts only one position. This clearly turned out to be a mistake. Since the metal overlayers were not metallic with only a submonolayer coverage. When cooled down, the overlayer becomes metallic and the two pinning positions merge to one. On the other hand, whether or not it's elemental or III-V, specifying the structure and chemistry of the interface is critical in determining the transport properties, which is just as important as the barrier height.

© 2007 Saeroonter Oh. The author grants permission to copy, distribute and display this work in unaltered form, with attribution to the author, for noncommercial purposes only. All other rights, including commercial rights, are reserved to the author.

References

[1] W. Spicer, et al., "New and Unified Model for Schottky Barrier and III-V Insulator Interface States Formation," J. Vac. Sci. Tech. 16, 5 (1979).

[2] W. Spicer et al., "The Advanced Unified Defect Model for Schottky Barrier Formation," J. Vac. Sci. Tech. B 6, 4 (1988).

[3] J. Tersoff, "Recent Models of Schottky Barrier Formation," J. Vac. Sci. Tech. B 3, 4 (1985).

[4] J. Tersoff, "Calculations of Schottky Barrier Heights from Semiconductor Band Structures," Surf. Sci. 168, 275 (1986).

[5] W. Spicer and A. Green, "Reaching Consensus and Closure on Key Questions, a History of Success, and Failure of GaAs Surfaces and Interfaces," J. Vac. Sci. Technol. B 11, 4 (1993).